00001 /* 00002 Copyright (c) 2002, 2003, Oliver Tscherwitschke 00003 All rights reserved. 00004 00005 Redistribution and use in source and binary forms, with or without 00006 modification, are permitted provided that the following conditions are met: 00007 00008 1. Redistributions of source code must retain the above copyright notice, 00009 this list of conditions and the following disclaimer. 00010 2. Redistributions in binary form must reproduce the above copyright notice, 00011 this list of conditions and the following disclaimer in the documentation 00012 and/or other materials provided with the distribution. 00013 3. The name of the author may not be used to endorse or promote products 00014 derived from this software without specific prior written permission. 00015 00016 THIS SOFTWARE IS PROVIDED BY THE AUTHOR "AS IS" AND ANY EXPRESS OR IMPLIED 00017 WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00018 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO 00019 EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 00020 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 00021 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 00022 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 00023 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 00024 OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 00025 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00026 */ 00027 00034 #ifndef HARDWARE_H 00035 #define HARDWARE_H 00036 00037 00038 /* 00039 * These definitions are only intended for otOS-internal use 00040 */ 00041 #ifdef COMPILE_OTOS 00042 00043 /* function prototypes */ 00044 void otosInitHardware(void); 00045 00046 00047 /* hardware dependent macros */ 00048 #define GET_RAM_BANK() ({ \ 00049 uint8_t bank; \ 00050 __asm__ volatile ( \ 00051 /* save ram bank */ \ 00052 "in %0, %1" "\n\t" /* read PORTE */ \ 00053 "andi %0, 0x3c" "\n\t" /* mask */ \ 00054 "lsr %0" "\n\t" /* >> 2 */ \ 00055 "lsr %0" "\n\t" \ 00056 : "=r" (bank) \ 00057 : "I" (_SFR_IO_ADDR(PORTE)) \ 00058 ); \ 00059 bank; \ 00060 }) 00061 00062 #define SET_RAM_BANK(bank) ({ \ 00063 uint8_t tmp; \ 00064 __asm__ volatile ( \ 00065 "lsl %1" "\n\t" /* << 2 */ \ 00066 "lsl %1" "\n\t" \ 00067 "in %0, %2" "\n\t" /* get PORTE */ \ 00068 "andi %0, 0xc3" "\n\t" /* mask */ \ 00069 "or %0, %1" "\n\t" /* combine */ \ 00070 "out %2, %0" "\n\t" /* output */ \ 00071 : "=&r" (tmp) \ 00072 : "r" (bank), "I" (_SFR_IO_ADDR(PORTE)) \ 00073 ); \ 00074 }) 00075 00076 00077 00078 00079 00080 #endif /* #ifdef COMPILE_OTOS */ 00081 00082 #endif